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aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 1 powerlinear ? general description the aat3244 is a dual, low input voltage, low dropout (ldo) linear regulator with two power ok (pok) outputs. two integrated regulators provide high power outputs of 300ma from an input voltage range of 1.8v to 5.5v. two pok pins provide open drain signals when their respective regulator is within regulation. the aat3244 has independent voltage inputs and enable pins for increased design flexibility. the device features a very low quiescent current (typi- cally 85a) and low dropout voltages (200mv at full load), making it ideal for portable applications where battery life is critical. the aat3244 is available in a space-saving, pb-free 12-pin tsopjw package and is capable of opera- tion over the -40c to +85c temperature range. features ? low input voltage 1.8v to 5.5v ? ultra-low adjustable output voltage 3.6v to 0.6v ? high output current 300ma per ldo ? low dropout voltage typ 200mv @ 300ma ? low 85a quiescent current (both ldos on) ? high output accuracy: 1.5% ? independent input supply and enable pins ? over-temperature protection ? 12-pin tsopjw package ? -40c to +85c temperature range applications ? cellular phones ? digital cameras ? handheld instruments ? microprocessor/dsp core/io power ? pdas and handheld computers typical application ina ena outa enable a v in = 3.6v gnd enb enable b inb outb v outa = 1.8v v outb = 3.3v c in 2.2f 1f gnd fbb fba poka poka vcc pokb pokb 2.2f 59k 100k 100k 267k 118k 59k
pin descriptions pin configuration tsopjw-12 (top view) pin # symbol function 1 outa 300ma regulator output pin; should be closely decoupled with a low equivalent series resistance (esr) ceramic capacitor. 2 ina input voltage pin for ldoa; should be closely decoupled. 3 fba feedback input pin for ldoa. this pin is connected to outa. it is used to see the output of ldoa to regulate to the desired value via an external resistor divider. 4 fbb feedback input pin for ldob. this pin is connected to outb. it is used to see the output of ldob to regulate to the desired value via an external resistor divider. 5 inb input voltage pin for ldob; should be closely decoupled. 6 outb 300ma regulator output pin; should be closely decoupled with a low esr ceramic capacitor. 7 pokb power ok pin with open drain output. it is pulled low when the outb pin is outside the regulation window of 10%. place a pull-up resistor between pokb and outb. 8 enb enable pin for ldob. active high. v en must be less than or equal to v cc . 9 vcc input bias supply. connect to an "always on" supply voltage between 2.7v and 5.5v. 10 gnd ground connection pin. 11 ena enable pin for ldoa. active high. v en must be less than or equal to v cc . 12 poka power ok pin with open drain output. it is pulled low when the outa pin is outside the regulation window of 10%. place a pull-up resistor between poka and outa. aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 2 3244.2007.08.1.1 1 2 3 4 5 6 12 11 10 9 8 7 outa ina fba fbb inb outb pok a ena gnd vcc enb pokb
absolute maximum ratings 1 thermal information symbol description value units p d maximum power dissipation (t a = 25c) 625 mw ja thermal resistance 2 160 c/w symbol description value units v cc , v in input voltage, ldo input voltage to gnd 6.0 v v fb fb to gnd -0.3 to v in + 0.3 v v en en to gnd -0.3 to 6.0 v t j operating junction temperature range -40 to 150 c t lead maximum soldering temperature (at leads, 300 c 10 sec) aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 3 1. stresses above those listed in absolute maximum ratings may cause permanent damage to the device. functional operation at c ondi- tions other than the operating conditions specified is not implied. only one absolute maximum rating should be applied at any one time. 2. mounted on an fr4 board.
electrical characteristics 1 v cc = v ina = v inb = 3.6v; t a = -40c to +85c, unless otherwise noted. typical values are t a = 25c. symbol description conditions min typ max units bias power supply v cc bias power supply input 2.7 5.5 v i q quiescent current v ena = v enb = v in ; i load = 0 85 160 a i shdn shutdown current v ena = v enb = gnd 1.0 a uvlo under-voltage lockout voltage v cc rising 2.6 v hysteresis 200 mv ldoa, ldob; i out = 300ma v in input voltage 1.8 5.5 v v out output voltage tolerance i out = 1ma t a = 25c -2.0 2.0 % to 300ma t a = -40c to +85c -3.5 3.5 v fb feedback voltage 0.594 0.6 0.606 v v do dropout voltage 2 i out = 300ma 200 300 mv v out / v out / v in line regulation 3 v in = v out + 1.0v to 5.0v 0.09 %/v v en(l) enable threshold low 0.6 v v en(h) enable threshold high 1.5 v cc v t en turn-on enable time 100 s v pok power ok trip threshold v out rising, t a = 25c 80 98 % of v out v pokhys power ok hysteresis 1.0 % of v out v pok(lo) power ok output voltage low i sink = 1ma 0.4 v i pok pok output leakage current v pok < 5.5v, v out in regulation 1.0 a i out output current v in(min) = 2.5v 300 ma i sd shutdown current v in = 5v 1.0 a t sd over-temperature shutdown 140 c threshold t hys over-temperature shutdown 15 c hysteresis aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 4 3244.2007.08.1.1 1. the aat3244 is guaranteed to meet performance specifications over the -40c to +85c operating temperature range and is assu red by design, characterization, and correlation with statistical process controls. 2. v do is defined as v in - v out when v out is 98% of nominal. 3. c in = 10f. 4. to calculate minimum input voltage, use the following equation: v in(min) = v out(max) + v do(max) as long as v in 1.8v.
typical characteristics aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 5 output voltage vs. temperature (v in = 3.6v; v out = 2.5v) temperature ( c) output voltage (v) 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 -40 -15 10 35 60 85 100ma 200ma 50ma 300ma quiescent current vs. temperature (v out = 2.5v) temperature ( c) quiescent current ( a) 72 74 76 78 80 82 84 86 88 -40 -15 10 35 60 85 v in = 3.0v v in = 3.6v v in = 4.2v quiescent current vs. input voltage (v out = 2.5v) input voltage (v) quiescent current (a) 40 50 60 70 80 90 100 110 120 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5. 5 -40c 85c 25c dropout voltage vs. output current (v out = 2.5v) output current (ma) dropout voltage (mv) 0 20 40 60 80 100 120 140 160 180 0 50 100 150 200 250 300 25c 85c -40c output voltage vs. input voltage (v out = 2.5v) input voltage (v) output voltage (v) 2.20 2.25 2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.5 2.6 2.7 2.8 2.9 3.0 300ma 250ma 200ma 150ma 50ma 100ma dropout voltage vs. temperature (v out = 2.5v; i out = 300ma) temperature ( c) dropout voltage (mv ) 60 80 100 120 140 160 180 200 220 -40 -15 10 35 60 85
typical characteristics aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 6 3244.2007.08.1.1 line transient (3.6v? 4.2v; v out = 1.8v) time (50s/div) input voltage (top) (v) output voltage (ac coupled) (bottom) (mv) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 -100 -50 0 50 100 over-current protection time (50ms/div) current (a) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 load transient (1ma ?200ma; v out = 1.8v) time (50s/div) output current (top) (a) output voltage (ac coupled) (bottom) (mv) 0.0 0.1 0.2 0.3 0 50 100 150 -100 -50 load transient (200ma?300ma; v out = 1.8v) time (50s/div) output current (top) (a) output voltage (ac coupled) (bottom) (mv) 0.0 0.1 0.2 0.3 0.4 -50 -25 0 25 50 load regulation (v out = 2.5) output current (ma) output voltage error (%) 0.00 0.50 1.00 1.50 2.00 -2.00 -1.50 -1.00 -0.50 0 1 10 100 100 0 v in = 2.7v v in = 3.0v v in = 3.6v v in = 4.2v turn-on time (v out = 1.8v) time (50s/div) enable (top) (v) output voltage (bottom) (v) 0 2 4 6 0.0 0.5 1.0 1.5 2.0 2.5 3.0
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 7 typical characteristics enable threshold voltage vs. input voltage input voltage (v) enable voltage (v) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5. 5 v ih v il ground current vs. input voltage input voltage (v) ground current ( a ) 60 70 80 90 100 110 120 130 2.5 3 3.5 4 4.5 5 5.5 i out = 10ma i out = 50ma i out = 100ma i out = 300ma pok output response time (200s/div) v out (1v/div) v in (2v/div) v pok (2v/div)
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 8 3244.2007.08.1.1 functional block diagram functional description the aat3244 is a high performance, low input volt- age, dual ldo linear regulator. both ldoa and ldob are capable of delivering 300ma of current, within power dissipation limits. the ldos are designed to operate with low-cost ceramic capaci- tors. for added flexibility, both regulators have independent input voltages operating from 1.8v to 5.5v, but share a common bias voltage, v cc . the v cc voltage should be tied to the highest system voltage available and should be available at all times. each regulator has an independent enable pin. an external feedback pin for each ldo allows programming the output voltage from 3.6v to 0.6v. the regulators have thermal protection in case of adverse operating conditions. a power ok comparator for each output is also integrated, which indicates when the output is with- in regulation. the pok is an open drain output and is held low when the aat3244 is in shutdown mode. refer to the thermal considerations section of this datasheet for details on device operation at maxi- mum output current loads. ina outb gnd outa inb fbb fba ena enb over-temperature protection voltage reference 94% poka pokb vcc ldo bias
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.200708.0.66 (advanced information) 9 applications information to assure the maximum possible performance is obtained from the aat3244, please refer to the fol- lowing application recommendations. input capacitor a 1f or larger capacitor is typically recommended for c in in most applications. a c in capacitor is not required for basic ldo regulator operation; howev- er, if the aat3244 is physically located more than three centimeters from an input power source, a c in capacitor will be needed for stable operation. c in should be located as closely to the device sup- ply pin as practically possible. c in values greater than 1f will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. ceramic, tantalum, or aluminum electrolytic capac- itors may be selected for c in . there is no specific capacitor esr requirement for c in ; however, for 300ma ldo regulator output operation, ceramic capacitors are recommended for c in due to their inherent capability over tantalum capacitors to with- stand input current surges from low impedance sources, such as batteries in portable devices. output capacitor for proper load voltage regulation and operational stability, a capacitor is required between pins out and gnd. the c out capacitor connection to the ldo regulator ground pin should be made as direct as practically possible for maximum device performance. the aat3244 has been specifically designed to func- tion with very low esr ceramic capacitors. for best performance, ceramic capacitors are recommended. typical output capacitor values for maximum out- put current conditions range from 1f to 10f. applications requiring low output noise and opti- mum power supply ripple rejection should use 2.2f or greater for c out . if desired, c out may be increased without limit. in low output current appli- cations where output load is less than 10ma, the minimum value for c out can be as low as 0.47f. capacitor characteristics ceramic composition capacitors are highly recom- mended over all other types of capacitors for use with the aat3244. ceramic capacitors offer many advantages over their tantalum and aluminum elec- trolytic counterparts. a ceramic capacitor typically has very low esr, is lower cost, has a smaller pcb footprint, and is non-polarized. line and load tran- sient response of the ldo regulator is improved by using low esr ceramic capacitors. since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage. equivalent series resistance esr is a very important characteristic to consider when selecting a capacitor. esr is the internal series resistance associated with a capacitor that includes lead resistance, internal connections, size and area, material composition, and ambient temperature. typically, capacitor esr is measured in milliohms for ceramic capacitors and can range to more than several ohms for tantalum or aluminum electrolytic capacitors. ceramic capacitor materials ceramic capacitors less than 0.1f are typically made from npo or c0g materials. npo and c0g materials generally have tight tolerance and are very stable over temperature. larger capacitor val- ues are usually composed of x7r, x5r, z5u, or y5v dielectric materials. these two material types are not recommended for use with ldo regulators since the capacitor tolerance can vary more than 50% over the operating temperature range of the device. a 2.2f y5v capacitor could be reduced to 1f over temperature; this could cause problems for circuit operation. x7r and x5r dielectrics are much more desirable. the temperature tolerance of x7r dielectric is better than 15%. capacitor area is another contributor to esr. capacitors
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 10 3244.2007.08.1.1 which are physically large in size will have a lower esr when compared to a smaller sized capacitor of an equivalent material and capacitance value. these larger devices can improve circuit transient response when compared to an equal value capac- itor in a smaller package size. consult capacitor vendor datasheets carefully when selecting capac- itors for ldo regulators. pok output the aat3244 features integrated power ok com- parators which can be used as an error flag. the pok open drain output goes low when output volt- age is 6% (typical) below its nominal regulation voltage. additionally, any time one of the regulators is in shutdown, the respective pok output is pulled low. connect a 100k pull up resistor from poka to either ina or outa, and pokb to either inb or outb. enable function the aat3244 features an ldo regulator enable/ dis- able function. each ldo has its own dedicated enable pin. these pins (ena, enb) are active high and are compatible with cmos logic. to assure the ldo regulators will switch on, in shutdown, the aat3244 will consume less than 1.0a of current. if the enable function is not needed in a specific application, it may be tied to vcc to keep the ldo regulator in a continuously on state. thermal protection the aat3244 has an internal thermal protection cir- cuit which will activate when the device die temper- ature exceeds 140c. the ldo regulator output will remain in a shutdown state until the internal die temperature falls back approximately 15c below the trip point. no-load stability the aat3244 is designed to maintain output volt- age regulation and stability under operational no- load conditions. this is an important characteristic for applications where the output current may drop to zero. reverse output-to-input voltage conditions and protection under normal operating conditions, a parasitic diode exists between the output and input of the ldo regulator. the input voltage should always remain greater than the output load voltage, main- taining a reverse bias on the internal parasitic diode. conditions where v out might exceed v in should be avoided since this would forward bias the internal parasitic diode and allow excessive current flow into the outa/b pins, possibly damaging the ldo regulator. in applications where there is a possibil- ity of v out exceeding v in for brief amounts of time during normal operation, the use of a larger value c in capacitor is highly recommended. a larger value of c in with respect to c out will result in a slower c in decay rate during shutdown, thus pre- venting v out from exceeding v in . in applications where there is a greater danger of v out exceeding v in for extended periods of time, it is recommend- ed to place a schottky diode across ina/b to outa/b (connecting the cathode to ina/b and anode to outa/b). the schottky diode forward voltage should be less than 0.45v. low voltage input bias considerations the input voltage of both ldos is designed to operate down to 1.8v input. however, to operate the ldo to its full potential, the aat3244 requires a minimum bias voltage (v cc ) of 2.7v for all ldo input voltages between 1.8v and 2.7v. in portable systems utilizing single-cell lithium-ion batteries, the vcc pin may be connected directly to the bat- tery. in non-portable applications, the voltage can be connected to any supply from 2.7v to 5.5v. in the event that one of the input supplies is above 2.7v, this can also be connected to vcc, assuming that the supply will always be available. 1.5v v en v cc
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 11 adjustable output resistor selection resistors r1, r2 and r3, r4 of figure 1 program the outputs to regulate at a voltage higher than 0.6v. to limit the bias current required for the exter- nal feedback resistor string while maintaining good noise immunity, the suggested value for r2 and r4 is 59k . decreased resistor values are necessary to maintain noise immunity on the fb pin, resulting in increased quiescent current. table 1 summarizes the resistor values for various output voltages. with enhanced transient response for extreme pulsed load application, an external feed-forward capacitor, (c6 and c7 in figure 1), can be added. table 1. adjustable resistor values for ldo regulator. r2 = 59k r2 = 221k v out (v) r1 (k ) r1 (k ) 0.8 19.6 75 0.9 29.4 113 1.0 39.2 150 1.1 49.9 187 1.2 59.0 221 1.3 68.1 261 1.4 78.7 301 1.5 88.7 332 1.8 118 442 1.85 124 464 2.0 137 523 2.5 187 715 3.3 267 1000 3.6 295 1105 figure 1: aat3244 schematic. ?? ?? r1 = - 1 r2 v out v ref tsopjw-12 poka pokb out a outb ina poka ena pokb inb outa outb c1 1uf c2 1uf c6 22pf c7 22pf gnd aat3244 12 7 3 1 4 6 ina enb ena enb vcc fba fbb vcc c4 2.2uf c5 2.2uf inb 2 11 5 8 10 on/off on/off 9 r5 100k r6 100k r1 adj. r2 59k r3 adj. r4 59k (optional) (optional)
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 12 (advanced information) 3244.200708.0.66 thermal considerations and high output current applications the aat3244 is designed to deliver continuous out- put load currents of 300ma under normal operating conditions and can supply up to 600ma during circuit start-up conditions. this is desirable for applications where there might be a brief high inrush current dur- ing a power-on event. the limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. in order to obtain high operating currents, careful device layout and circuit operating conditions need to be taken into account. the following discussions will assume the ldo regulator is mounted on a print- ed circuit board utilizing the minimum recommended footprint as stated in the layout considerations sec- tion of this document. at any given ambient temper- ature (t a ), the maximum package power dissipation can be determined by the following equation: constants for the aat3244 are t j(max) (the maxi- mum junction temperature for the device, which is 125c) and ja = 160c/w (the package thermal resistance). typically, maximum conditions are cal- culated at the maximum operating temperature of t a = 85c and under normal ambient conditions where t a = 25c. given t a = 85c, the maximum package power dissipation is 250mw. at t a = 25c, the maximum package power dissipation is 625mw. the maximum continuous output current for the aat3244 is a function of the package power dissipation and the input-to-output voltage drop across the ldo regulator. to determine the maxi- mum output current for a given output voltage, refer to the following equation. this calculation accounts for the total power dissipation of the ldo regulator, including that caused by ground current. this formula can be solved for i outa to determine the maximum output current for ldoa: the following is an example for a 2.5v output: v outa = 2.5v v outb = 1.5v i outb = 150ma v in = 4.2v i gnd = 125a i outa(max) = 129ma from the discussion above, p d(max) was deter- mined to equal 625mw at t a = 25c. therefore, with regulator b delivering 150ma at 1.5v, regulator a can sustain a constant 2.5v out- put at a 129ma load current at an ambient temper- ature of 25c. higher input-to-output voltage differ- entials can be obtained with the aat3244, while maintaining device functions within the thermal safe operating area. to accomplish this, the device thermal resistance must be reduced by increasing the heat sink area or by operating the ldo regula- tor in a duty-cycled mode. for example, an application requires v in = 4.2v while v outa = 1.5v at a 300ma load, v outb = 1.5v at a 200ma load, and t a = 25c. to maintain this high input voltage and output current level, the ldo regulator must be operated in a duty-cycled mode. refer to the following calculation for duty-cycle operation: i gnd = 125a i outa = 300ma i outb = 200ma v in = 4.2v v out = 1.5v p d(max) is assumed to be 625mw %dc = 46.3% %dc = 100(p d(max) ) [(v in - v outa )i outa + (v in i gnd )] + [(v in - v outb )i outb + (v in i gnd )] %dc = 100 625mw [(4.2v - 1.5v)300ma + (4.2v 125a)] + [(4.2v - 1.5v)200ma + (4.2v 125a)] i outa(max) = 625mw - (2 4.2v 125a) - (4.2 - 1.5) 150m a 4.2 - 2.5 i outa(max) = p d(max) - (2 v in i gnd ) - (v in - v outb ) i outb v in - v outa p d(max) = [(v in - v outa )i outa + (v in i gnd )] + [(v in - v outb )i outb + (v in i gnd )] p d(max) = t j(max) - t a ja
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 13 for a 300ma output current and a 2.7v drop across the aat3244 at an ambient temperature of 25c, the maximum on-time duty cycle for the device would be 46.3%. under-voltage lockout under-voltage lockout (uvlo) guarantees suffi- cient v cc bias and proper operation of all internal circuits prior to activation. printed circuit board layout recommendations the suggested pcb layout for the aat3244 in a tsopjw-12 package is shown in figures 2 and 3. the following guidelines should be used to help ensure a proper layout. 1. the input capacitors (c1and c2) should con- nect as closely as possible to input pins (pin 2 and pin 5) and gnd (pin 10). 2. the output traces of the feedback resistors (r1 and r3) should be separate from any power trace and connect as closely as possible to the load point. sensing along a high-current load trace will degrade dc load regulation. feedback resistors should be placed as closely as possible to the fb pin (pin 3 and pin 4) to minimize the length of the high impedance feedback trace. 4. the resistance of the trace from the load returns to gnd (pin 10) should be kept to a minimum. this will help to minimize any error in dc regu- lation due to differences in the potential of the internal signal ground and the power ground. 5. the feedback node is connected directly to the non-inverting input of the error amplifier, thus any noise or ripple from the divider resistors will be subsequently amplified by the gain of the error amplifier. this effect can increase noise seen on the ldo regulator output, as well as reduce the maximum possible power supply ripple rejection. for low output noise and highest possible power supply ripple rejec- tion performance, it is critical to connect the divider resistors (r2 and r4) and output capacitors (c4 and c5) directly to the ldo reg- ulator ground pin. this method will eliminate any load noise or ripple current feedback through the ldo regulator. evaluation board layout the aat3244 evaluation layout follows the recom- mend printed circuit board layout procedures and can be used as an example for good application layouts (see figures 2 and 3). note: board layout shown is not to scale. figure 2: aat3244 evaluation board figure 3: aat3244 evaluation board top side layout. bottom side layout.
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 14 3244.2007.08.1.1 ordering information voltage package ldo a ldo b marking 1 part number (tape and reel) 2 tsopjw-12 0.6v 0.6v wtxyy AAT3244ITP-AA-T1 1. xyy = assembly and date code. 2. sample stock is generally held on part numbers listed in bold . legend voltage code adjustable a (0.6v) all analogictech products are offered in pb-free packaging. the term pb-free means semiconductor products that are in compliance with current rohs standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. for more information, please visit our website at http://www.analogictech.com/pbfree.
aat3244 300ma adjustable dual cmos low voltage ldo linear regulator 3244.2007.08.1.1 15 package information tsopjw-12 all dimensions in millimeters. advanced analogic technologies, inc. 830 e. arques avenue, sunnyvale, ca 94085 phone (408) 737-4600 fax (408) 737-4611 ? advanced analogic technologies, inc. analogictech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an analogictech pr oduct. no circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. analogictech reserves the right to make changes to their products or specifications or to discontinue any product or service with- out notice. except as provided in analogictechs terms and conditions of sale, analogictech assumes no liability whatsoever, an d analogictech disclaims any express or implied war- ranty relating to the sale and/or use of analogictech products including liability or warranties relating to fitness for a part icular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. in order to minimize risks associated with the customers applications, adequa te design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. testing and other quality control techniques are utilized to the extent an alogictech deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed. analogictech and the analogictech logo are trad emarks of advanced analogic technologies incorporated. all other brand and product names appearing in this document are registered trademarks or trademarks of their respective holder s. 0.20 + 0.10 - 0.05 0.055 0.045 0.45 0.1 5 7 nom 4 4 3.00 0.10 2.40 0.10 2.85 0.20 0.50 bsc 0.50 bsc 0.50 bsc 0.50 bsc 0.50 bsc 0.15 0.05 0.9625 0.0375 1.00 + 0.10 - 0.065 0.04 ref 0.010 2.75 0.25

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